On Tue, Nov 10, 2020 at 01:59:42PM +0000, Michael Grunditz wrote:
Another reason might be some alignment constraints? To be really sure, what is going on, you could temporarily change the exception vector in file 'repos/base-hw/src/core/spec/arm_v8/exception_vector.s' at the very beginning to, e.g.:
.section .text.crt0
.rept 16 mrs x0, elr_el1 mrs x1, spsr_el1 adr x2, . and x2, x2, #0xf80 bl kernel .balign 128 .endr
And change the function kernel() to something like:
extern "C" void kernel(void * ip, void * spsr, void * off, void * esr_el1) { Genode::raw("ip=", ip, " spsr=", spsr, " exc_off=", off, " esr_el1=", esr_el1); }
Then the outcome of the first printing would be quite interesting to know.
Regards Stefan
Kernel: ip=0xffffffc00008ed60 spsr=0x600003c5 exc_off=0x200 esr_el1=0xffffffe02ff22000
Ok, the first three arguments are meaningful, and you can check the ip with you core binary. The core binary with debug information can be found in your build directory under 'var/run/[run-script-name].core'
The ESR_EL1 argument is wrong. I forgot it in the assembler sippet above. The complete exception vector should be:
.section .text.crt0
.rept 16 mrs x0, elr_el1 mrs x1, spsr_el1 mrs x3, esr_el1 adr x2, . and x2, x2, #0xf80 bl kernel .balign 128 .endr
Sorry, for the inconvenience, I'm afraid you have to give it a second try.
Regards Stefan
Going to look up that esr.
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