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solved: no GRUB boot with NOVA
by unknown＠example.com 04 Dec '16

04 Dec '16

Solved. Now booting lighttpd on an N3150 board. > DD'ing the lighttpd .iso image to a USB drive is odd too. On both machines I get dumped into the grub shell. For anyone else with the same problem: https://github.com/genodelabs/genode/blob/master/doc/release_notes-14-08.txt #L1105 BTW A serial connection is IMO absolutely critical for real hardware work. Jerry.

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(New to Genode) A couple of questions ...
by unknown＠example.com 04 Dec '16

04 Dec '16

Greetings, I'm experimenting with Genode/NOVA on x64 for some embedded work, version 16.08 building on Ubuntu 16.04. I'm trying to assemble a minimal (headless) platform with TCP/IP and USB support. The idea is to run a single custom control application on the platform. If anyone has a schema/scenario that is close to this pattern they'd care to share I'd be very grateful. But by way of getting underway ... I started with netperf_lxip as this does have the network stack and USB but I get this: $ ./tool/ports/prepare_port nova $ ./tool/create_builddir nova_x86_64 BUILD_DIR=build.nova $ make -C build.nova run/netperf_lxip make: Entering directory '/home/jevans/src/genode/build.nova' including /home/jevans/src/genode/tool/run/boot_dir/nova including /home/jevans/src/genode/tool/run/power_on/qemu including /home/jevans/src/genode/tool/run/log/qemu including /home/jevans/src/genode/tool/run/image/iso including /home/jevans/src/genode/repos/ports/run/netperf_lxip.run Netperf running on Qemu is not recommended. make: Leaving directory '/home/jevans/src/genode/build.nova' and no build outputs whatsoever. Any thoughts on this? Lighttpd _does_ build out of the box and appears to run OK under QEMU but if I boot the image in VMWare I get Promisc is off Bender: Hello World. Need 0067b000 bytes to relocate modules. Relocating to 07965000: Copying 6651920 bytes... Copying 138968 bytes... And the VM then locks before the 'NOVA Microhypervisor v7-4d6f04d (x86_64): Dec 2 2016 17:01:35 [gcc 4.9.2]' banner appears. Once again any thoughts on how to proceed here much appreciated. Genode and friends are a pretty marvellous resource. Many thanks. BR, Jerry.

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Announcement: Genode OS Framework version 16.11 released
by Christian Helmuth 30 Nov '16

30 Nov '16

In the new release, we revisited the most fundamental aspect of the framework - the interplay between parent and child components. We replaced the fully synchronous model of communication in this constellation by asynchronous communication to vastly improve scalability and reduce the effort of thorough evaluation of crucial system components. Further, we refined the design and configuration interface of our NIC-router component to ease its application in common use cases. Additional highlights are NOVA kernel improvements, VirtualBox version updates, and support for smart cards. The current release contains the following changes and new features. - Base framework - Redesigned interplay between parent and child components - Improved RPC mechanism - Ongoing transition to modernized framework API - Extended virtual-networking capabilities - New timeout-handing API - Support for smart cards - Time-based password generation - NOVA hypervisor - VirtualBox updated to versions 4.3.40 and 5.1.10 - New asynchronous map operation Read the complete release documentation for the version 16.11 at https://genode.org/documentation/release-notes/16.11 Best regards -- Christian Helmuth Genode Labs https://www.genode-labs.com/ · https://genode.org/ https://twitter.com/GenodeLabs · /ˈdʒiː.nəʊd/ Genode Labs GmbH · Amtsgericht Dresden · HRB 28424 · Sitz Dresden Geschäftsführer: Dr.-Ing. Norman Feske, Christian Helmuth

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Assembly at 33C3?
by Johannes Schlatow 25 Nov '16

25 Nov '16

Hi Genode hackers, recently, the call for participation for the 33th Chaos Communication Congress [1] has been released, an amazing event I very much enjoy attending for quite a few years now. This year, I'm thinking about organising an assembly at which I can focus on some side projects of mine that are partly Genode related. For those of you who are not familiar with the concept: An assembly is a self-organised get-together and typically targeted at a certain topic. I.e. it can be a place for exchanging ideas, lively discussion and even collaborative hacking, and all of this for the entire congress. ;-) As the Genode community seems to be growing, I'd like to ask whether someone here is 1) considering attending the 33C3 and 2) interested in an assembly about Genode-related projects? @GenodeLabs: I reckon that the date of the congress might not be very convenient for some of you. Nevertheless, I think it'd be great having one or more Genode experts at the congress to represent the project properly. I also see the opportunity for you to do some tutorials, e.g. for the Turmvilla/Heeselicht scenario. [1] https://events.ccc.de/2016/09/01/call-for-participation-33rd-chaos-communic…

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Assigning PCI device to device_pd
by Alexander Senier 22 Nov '16

22 Nov '16

Hi all, I'm building a toy driver to experiment with the details of Intel integrated graphics. My experiments are based on Genode 16.08 (master) using NOVA. Getting a capability to the IGD device (0:2:0) from the platform driver works, so does reading/writing PCI config space, mapping BAR0 and accessing MMIO registers. Next, I want to test DMA from the IGD device by 1. Allocating DMA memory (via alloc_dma_buffer()) and attaching it to the driver address space 2. Mapping the aperture (BAR2) 3. Pointing the GTT to the physical address of the DMA memory allocated in 1. 4. Writing some data to the DMA memory 5. Reading that data back through the aperture Unfortunately, I'm stuck with that test. Apparently the IOMMU mappings are not set up correctly and NOVA emits respective IOMMU faults: [ 0] DMAR:0xffffffff81034040 FRR:0 FR:0x5 BDF:0:2:0 FI:0x041d4000 The BDF is the expected IGD device and the fault address matches the physical address of the allocated DMA memory (and the PTE set up in the GTT). When instrumenting device_pd, I see that attach_dma_mem() is called for the correct physical address and size. However, assign_device() never gets called for 0:2:0. The only place I see where assign_device() is used in the code, is in config_write() when writing PCI_CMD_DMA to PCI_CMD_REG. However, when doing such a config_write() manually in my component, I get an Out_of_metadate exception. How can I assign the PCI device to my drivers device_pd? See [1] for example code. Thanks a lot! Cheers, Alex [1] https://github.com/senier/gpu_kernel/tree/master/src/app/hello_gpu

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Re: RPC interface to get random numbers
by Duss Pirmin 17 Nov '16

17 Nov '16

Spam detection software, running on the system "idefix.duss.local", has identified this incoming email as possible spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see @@CONTACT_ADDRESS@@ for details. Content preview: Hello Norman Quoting Norman Feske <norman.feske@...1...>: > Hello Pirmin, > > thanks for posting your idea to the list. > > I wonder, have you considered to implement the random service as a > "Terminal" service that just produces a stream of random values? The > benefit would be that such a server can be combined with the existing > terminal infrastructure out of the box. For example, you could mount the > random server's session in the VFS (via a <terminal> node) without any > extra effort. [...] Content analysis details: (7.1 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- 0.2 CK_HELO_GENERIC Relay used name indicative of a Dynamic Pool or Generic rPTR 2.9 HELO_DYNAMIC_SPLIT_IP Relay HELO'd using suspicious hostname (Split IP) 3.6 RCVD_IN_PBL RBL: Received via a relay in Spamhaus PBL [92.106.180.179 listed in zen.spamhaus.org] 0.0 RCVD_IN_SORBS_DUL RBL: SORBS: sent directly from dynamic IP address [92.106.180.179 listed in dnsbl.sorbs.net] 0.4 RDNS_DYNAMIC Delivered to internal network by host with dynamic-looking rDNS

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RPC interface to get random numbers
by Duss Pirmin 15 Nov '16

15 Nov '16

Spam detection software, running on the system "idefix.duss.local", has identified this incoming email as possible spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see @@CONTACT_ADDRESS@@ for details. Content preview: Hello We have different components in our system that require random numbers. So our idea is to implement an RPC interface that allows one component to provide random numbers and an other to receive them. [...] Content analysis details: (7.1 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- 0.2 CK_HELO_GENERIC Relay used name indicative of a Dynamic Pool or Generic rPTR 2.9 HELO_DYNAMIC_SPLIT_IP Relay HELO'd using suspicious hostname (Split IP) 0.0 RCVD_IN_SORBS_DUL RBL: SORBS: sent directly from dynamic IP address [92.106.180.179 listed in dnsbl.sorbs.net] 3.6 RCVD_IN_PBL RBL: Received via a relay in Spamhaus PBL [92.106.180.179 listed in zen.spamhaus.org] 0.4 RDNS_DYNAMIC Delivered to internal network by host with dynamic-looking rDNS

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memory reference monitor in SW
by Rijurekha Sen 11 Nov '16

11 Nov '16

I have an imx53 sabre tablet. I am trying to implement a reference monitor in SW, to create a trace for memory accesses from android running in NW. I do not need to monitor all memory accesses, but those corresponding to IPU and I2C. I am actually interested in the OV5642 camera module - and want to monitor in SW all memory read/writes corresponding to android camera activities running in NW. Going through the android device driver code, saw that IPU and I2C do the memory related operations and configurations for the camera. In http://www.mit.edu/afs.new/sipb.mit.edu/project/freebsd/head/sys/gnu/dts/ar…, which matches the IMX53 reference manual, the IPU and three I2C physical address ranges are mentioned. If I want to create a reference monitor for these physical memory addresses, should I mark these as secure memory? According to https://community.arm.com/thread/4852#15483, to just read/write NW pages, SW doesn’t need extra hardware configuration like TZASC, M4IF, TZPC or CSU. This is possibly what https://www.informatik.tu-darmstadt.de/fileadmin/user_upload/Group_TRUST/Pu… uses to check/modify android loaded in NW RAM. But my SW will need to know when NW is making a particular memory access, so the ability to passively read/write NW memory locations from SW isn’t useful. How can I mark multiple blocks of physical address ranges (corresponding to memory mapped IO and not SRAM/DRAM) as secure? The M4IF seems to split the DDR external memory into two blocks. Should I use TZASC, as according to genode documentation - "Due to experimentation, we were able to deduct the following insights. The TZASC controller on the platform is used to secure physical address ranges that are addressable through the Static Memory Controller (SMC). In principal, it should be possible to secure another memory controller by a TZASC too, but on the platform, it is restricted to the SMC. These physical address regions correspond to the I/O resources of peripheral devices, some SRAM, and flash memory.” Or do I need to configure the CSU? What is the way to configure TZASC or CSU, to make particular physical address ranges secure? When some physical memory is marked as secure, does NW access there cause a data abort? Does it automatically trap to monitor code, and SW can see what NW instruction caused it? I will need to record that access in SW, emulate that instruction in SW and give back control to NW. I understand that because IPU is needed for any display related activity (and accel/magnetometer/audio … all seem to be I2C devices), making those memory regions secure will cause android to fault even at booting. So I will possibly see the intended behavior, even without using the android camera. Thanks in advance for any suggestions on how to proceed. Thanks! Riju

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booting android in normal world: imx53 sabre
by unknown＠example.com 10 Nov '16

10 Nov '16

Hi, I am using an IMX53 Sabre tablet, and can run the Genode demo. I need to reduce the TCB as much as possible, so ran the bare-bone kernel examples at https://github.com/finallyjustice/imx53qsb-code. for these, $make gave a kernel.imx which I wrote with dd to SD card. On power up, the board booted and ran the secure world code, and toggled with normal world, based on the program logic. There was no separate u-boot for these. I now need to boot android in NW, from the bare-bone kernel.imx in SW. I have the android images, the linux kernel uImage and u-boot.bin. Also, there is an android image in the e-mmc of the tablet, which the genode demo used. Can someone explain to me what I need to do - to boot android in NW from the bare-bone kernel in SW? (a) According to http://stackoverflow.com/questions/31589143/boot-linux-in-normal-world, https://community.nxp.com/thread/308152, https://community.nxp.com/thread/300696, I need to set some registers. I can see at https://github.com/finallyjustice/liboot-tz/blob/master/u-boot/arch/arm/lib…, how to do that. (b) Should I then write the kernel.imx of the compiled bare-bone program to SD card, followed by the android images, using dd with seek? The i.MX Android R10.4 User Guide partitioned the SD card into 5 partitions for data/boot/system/recovery etc. To boot android in NW, will the SD card need similar formatting and copying of files, and kernel.imx before that? Is there a way to not put the android image in the SD card, and instead load it from e-mmc? (c) http://stackoverflow.com/questions/29898139/load-two-kernel-images-using-u-… uses tftp to copy the image at the specified RAM locations, but how can I load the android image from the SD card/ emmc to a particular RAM location? I used ext2load mmc 0:1 0x70800000 image.bin for the genode demo. So here, will I need u-boot to load the kernel.imx and the android image to two separate addresses, start the kernel.imx with u-boot go, and then the "ldr pc, =android address" asm command followed by world switch will boot android? Thanks! Riju

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Clang compatibilities
by Keiko Nakata 04 Nov '16

04 Nov '16

Hallo! Is the Genode framework source code compatible with Clang? Best regards, Keiko

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