Hello,
While implementing lazy FPU loading/storing for the x86 base-hw port I came across an issue with regards to data structure alignment. The implementation is similar to the one of base-hw cortex A9 and uses the Cpu_lazy_state class to store the FPU state, see [1].
To use the fx[save|rstor] instructions, the storage area must be 16-byte aligned which I set as alignment of the Cpu_lazy_state class [2]. Checking the alignment of the data structure during runtime showed however, that the constraint is not correctly adhered to. I suspect that the Kernel::Cpu_job class, which contains the lazy state [3], is allocated without consideration for the required alignment.
I have worked around the issue by manually ensuring the correct alignment [4] but I consider it a hack would like to get rid of it.
Since I am not quite sure how Cpu_job is allocated and what its life cycle looks like, I would be glad if someone could give me some pointers to verify my suspicion and give a suggestion on how one would go about ensuring the proper alignment of all instances of Cpu_lazy_state.
Regards, Adrian
[1] - https://github.com/codelabs-ch/genode/blob/9a2a85c807a695a91088b6ab6e0d0de42... [2] - https://github.com/codelabs-ch/genode/blob/9a2a85c807a695a91088b6ab6e0d0de42... [3] - https://github.com/codelabs-ch/genode/blob/hw_x86-fpu/repos/base-hw/src/core... [4] - https://github.com/codelabs-ch/genode/commit/996ffa6407effaa45488ddf3e41986c...
Hi Adrian,
In base-hw, there are three types of executable subjects by now: user threads, virtual machines, and CPU-idle contexts. The CPU job is the base class that is common to all of them. All CPU-idle contexts (as members of the CPU objects in the CPU pool in base-hw/src/core/kernel/cpu.cc) and the first core thread (in 'init_kernel_mp_primary') are static objects.
The other threads and all VMs get created by core via the syscalls 'new_thread' and 'new_vm' providing the target address as argument. So the address of these objects is determined by core using the allocators of the appropriate VM/CPU session (see '_kernel_thread' in base-hw/src/core/include/platform_thread.h, '_platform_thread' in base/src/core/include/cpu_session_component.h, and '_vm' in base-hw/src/core/include/spec/*/vm_session_component.h).
So, to ensure alignment in CPU job, you would have to modify attributes of the mentioned static instances and check the pointer arguments in the syscall back-ends of 'new_thread' and 'new_vm'. Furthermore, the session back-ends in core would have to be modified in a way that they allocate new 'Cpu_thread_component's and 'Vm_session_component's aligned.
I don't know wether this is worth the effort, and besides, this would also raise complexity of the kernel interface.
Cheers, Martin
On 09.03.2015 15:01, Adrian-Ken Rueegsegger wrote:
Hello,
While implementing lazy FPU loading/storing for the x86 base-hw port I came across an issue with regards to data structure alignment. The implementation is similar to the one of base-hw cortex A9 and uses the Cpu_lazy_state class to store the FPU state, see [1].
To use the fx[save|rstor] instructions, the storage area must be 16-byte aligned which I set as alignment of the Cpu_lazy_state class [2]. Checking the alignment of the data structure during runtime showed however, that the constraint is not correctly adhered to. I suspect that the Kernel::Cpu_job class, which contains the lazy state [3], is allocated without consideration for the required alignment.
I have worked around the issue by manually ensuring the correct alignment [4] but I consider it a hack would like to get rid of it.
Since I am not quite sure how Cpu_job is allocated and what its life cycle looks like, I would be glad if someone could give me some pointers to verify my suspicion and give a suggestion on how one would go about ensuring the proper alignment of all instances of Cpu_lazy_state.
Regards, Adrian
[1] - https://github.com/codelabs-ch/genode/blob/9a2a85c807a695a91088b6ab6e0d0de42... [2] - https://github.com/codelabs-ch/genode/blob/9a2a85c807a695a91088b6ab6e0d0de42... [3] - https://github.com/codelabs-ch/genode/blob/hw_x86-fpu/repos/base-hw/src/core... [4] - https://github.com/codelabs-ch/genode/commit/996ffa6407effaa45488ddf3e41986c...
Dive into the World of Parallel Programming The Go Parallel Website, sponsored by Intel and developed in partnership with Slashdot Media, is your hub for all things parallel software development, from weekly thought leadership blogs to news, videos, case studies, tutorials and more. Take a look and join the conversation now. http://goparallel.sourceforge.net/ _______________________________________________ genode-main mailing list genode-main@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/genode-main
-
Adrian-Ken Rueegsegger -
Martin Stein