Hi Stefan,
I don't know how RDC would help me. It is useful for shared peripherals, but for shared memory addresses will be different each time. Thanks for reminding me! The manual is pretty big.
On Mon, 8 Mar 2021 at 10:14, Stefan Kalkowski stefan.kalkowski@genode-labs.com wrote:
Hello Michael,
I'm pretty sure you already know that, but just in case you don't:
within the i.MX 8M SoC there is a security mechanism called "resource domain controller" that enables one to divide the device peripherals in between different OSes running on the different cores. Which means you can - beside the IRQ routing - also prevent that the wrong OS touches a MMIO region of a device not assigned to it. I have not used that mechanism actively, but given your use-case it might be interesting for you.
Best regards Stefan
On Mon, Mar 08, 2021 at 01:58:40AM +0100, Michael Grunditz wrote:
In message <CAO3d8HiWwzqnWE+GqGYOhWaJN6KOmiidFBLB6rJC+x2_Mx7Btw@mail.gmail .com> Edoardo Mantovani mantovani.edoardo18@gmail.com wrote:
Hi Michael, Sorry if I am late, but only now I had time for read this: http://www.update.uu.se/~micken/ronetbsd.html
Thanks.
Extremely interesting and, at the same time, extremely fast to read, I have only one question: Have you created two more GRUB partitions (separate one from each other) to boot the 2 systems?
ARM doesn't use GRUB , it uses u-boot. I have only done this for RK3399 SoC. It started with the fact that the cpu was continuing running after I started RISC OS on the A72 core 0. I figured that this could be (ab)used to run a second system.
it would be interesting to know more about the boot phase because honestly I can't understand if there could be problems related to the probe of the connected devices (like, if the 2 OS at the same time probe via PCI for the same hardware at the same time, could an error occur? for example something like "device busy, impossible to connect with it"?) It would be very interesting for an article about an advanced Fault Injection methodology that I've been thinking about for a long time.
I am very careful not to use the same devices from the different OSes. I am using what is called affinity routing in the interrupt "chip" (General Interrupt Controller). It does route the interrupts to different CPUs. That means that only the supported hardware interrupts.
I have written a couple of drivers for NetBSD in order to use the WiMP in RISC OS (the desktop) as input and display devices.
The NetBSD project is the first of it kind ,according to NetBSD developers. There are other uses that do run a realtime system on a small cpu. But I haven't found anything that does run full scale OSes without virtualization . Correct me if I am wrong!
Let me know, Regards, Edoardo Mantovani, 2021
<big snip>
You can in theory run 4 OSes on a quad core cpu. But the OSes needs to be able to run quite limited.
Best regards,
Michael
-- Michael Grunditz Sent from my RISC OS workstation..
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