Hello Johannes,
thank you for sharing your experience and plans. Both facets, the FPGA line of work and the tracing topic are exciting. Especially the latter fits perfectly into the recurring theme of optimization and deep performance/latency analysis. It could play a vital role to get the browser running at acceptable performance on the Pinephone for example. I also have QoS challenges - in particluar low-latency audio processing - in the back of my head for 2022. Holistic and precise event tracing would be a godsend.
Regarding the FPGA topic, I am going to familiarise myself with the Xilinx tools in order to build custom bitstreams. In particular, I'd like to investigate solutions for guarding DMA via custom FPGA logic. The main idea is to emulate the register interface of DMA-capable devices in the FPGA and having a SystemMMU-like access control mechanism controlled by the platform driver.
That's a cool idea, especially as IOMMUs don't seem to be commonplace in the ARM world yet.
By the end of the year, I envision having sophisticated and easy-to-use tracing tools for Genode that we are able to routinely use for debugging and performance analysis.
On the FPGA topic, custom programmable logic will integrate nicely into Genode and there will be corresponding documentation for how to augment a resource-limited embedded Genode system with custom hardware accelerators.
What a beautiful outlook! :-)
Cheers Norman