Hello Chirag,
On 04/17/2015 07:51 AM, chirag garg wrote:
Hi all,
I am working on imx6 SABER Lite board. I tried to enable TZASC(TrustZone Address Space Controller) through fuse programming and i guess it works fine. when i make RAM region secure in which Normal OS(another Genode image) is running it gives me pf_abort exception which seems to be fine (guess).
But I am always getting the FIQ exception as virtual machine start in secure world. What could be the reason behind this ?
Well, you don't get a FIQ exception here. In your VMM implementation that you referenced in another mail:
https://github.com/iitmadras/genode/blob/hw_sabrelite_tz_support/repos/os/sr...
I can see that you dump the VM state before starting the VM. So what you see in the first "Cpu state" message is a state initialized with ones.
Btw. you will never get a FIQ exception as TrustZone VMM in the current kernel implementation, because they are all handled by the secure side's kernel.
Regards Stefan
Message Log: Starting kernel ...
kernel initialized Genode 15.02 int main(): --- create local services --- int main(): --- start init --- int main(): transferred 507 MB to init int main(): --- init created, waiting for exit condition --- [init] parent provides [init] service "ROM" [init] service "RAM" [init] service "IRQ" [init] service "IO_MEM" [init] service "CAP" [init] service "PD" [init] service "RM" [init] service "CPU" [init] service "LOG" [init] service "SIGNAL" [init] service "VM" [init] child "tz_vmm" [init] RAM quota: 3932160 [init] ELF binary: tz_vmm [init] priority: 0 [init -> tz_vmm] Start virtual machine ... [init -> tz_vmm] Cpu state: [init -> tz_vmm] Register Virt Phys [init -> tz_vmm] --------------------------------- [init -> tz_vmm] r0 = ffffffff [00000000] [init -> tz_vmm] r1 = ffffffff [00000000] [init -> tz_vmm] r2 = ffffffff [00000000] [init -> tz_vmm] r3 = ffffffff [00000000] [init -> tz_vmm] r4 = ffffffff [00000000] [init -> tz_vmm] r5 = ffffffff [00000000] [init -> tz_vmm] r6 = ffffffff [00000000] [init -> tz_vmm] r7 = ffffffff [00000000] [init -> tz_vmm] r8 = ffffffff [00000000] [init -> tz_vmm] r9 = ffffffff [00000000] [init -> tz_vmm] r10 = ffffffff [00000000] [init -> tz_vmm] r11 = ffffffff [00000000] [init -> tz_vmm] r12 = ffffffff [00000000] [init -> tz_vmm] sp = ffffffff [00000000] [init -> tz_vmm] lr = ffffffff [00000000] [init -> tz_vmm] ip = ffffffff [00000000] [init -> tz_vmm] cpsr = ffffffff [init -> tz_vmm] sp_und = ffffffff [00000000] [init -> tz_vmm] lr_und = ffffffff [00000000] [init -> tz_vmm] spsr_und = ffffffff [00000000] [init -> tz_vmm] sp_svc = ffffffff [00000000] [init -> tz_vmm] lr_svc = ffffffff [00000000] [init -> tz_vmm] spsr_svc = ffffffff [00000000] [init -> tz_vmm] sp_abt = ffffffff [00000000] [init -> tz_vmm] lr_abt = ffffffff [00000000] [init -> tz_vmm] spsr_abt = ffffffff [00000000] [init -> tz_vmm] sp_irq = ffffffff [00000000] [init -> tz_vmm] lr_irq = ffffffff [00000000] [init -> tz_vmm] spsr_irq = ffffffff [00000000] [init -> tz_vmm] sp_fiq = ffffffff [00000000] [init -> tz_vmm] lr_fiq = ffffffff [00000000] [init -> tz_vmm] spsr_fiq = ffffffff [00000000] [init -> tz_vmm] ttbr0 = ffffffff [init -> tz_vmm] ttbr1 = ffffffff [init -> tz_vmm] ttbrc = ffffffff [init -> tz_vmm] dfar = ffffffff [00000000] [init -> tz_vmm] exception = fiq [init -> tz_vmm] Curious exception occured [init -> tz_vmm] Cpu state: [init -> tz_vmm] Register Virt Phys [init -> tz_vmm] --------------------------------- [init -> tz_vmm] r0 = 00000000 [00000000] [init -> tz_vmm] r1 = 00000eb9 [00000000] [init -> tz_vmm] r2 = 30000100 [00000000] [init -> tz_vmm] r3 = 00000000 [00000000] [init -> tz_vmm] r4 = 00000000 [00000000] [init -> tz_vmm] r5 = 00000000 [00000000] [init -> tz_vmm] r6 = 00000000 [00000000] [init -> tz_vmm] r7 = 00000000 [00000000] [init -> tz_vmm] r8 = 00000000 [00000000] [init -> tz_vmm] r9 = 00000000 [00000000] [init -> tz_vmm] r10 = 00000000 [00000000] [init -> tz_vmm] r11 = 00000000 [00000000] [init -> tz_vmm] r12 = 00000000 [00000000] [init -> tz_vmm] sp = 00000000 [00000000] [init -> tz_vmm] lr = 00000000 [00000000] [init -> tz_vmm] ip = 30001000 [00000000] [init -> tz_vmm] cpsr = 00000093 [init -> tz_vmm] sp_und = 00000000 [00000000] [init -> tz_vmm] lr_und = 00000000 [00000000] [init -> tz_vmm] spsr_und = 00000000 [00000000] [init -> tz_vmm] sp_svc = 00000000 [00000000] [init -> tz_vmm] lr_svc = 00000000 [00000000] [init -> tz_vmm] spsr_svc = 00000000 [00000000] [init -> tz_vmm] sp_abt = 00000000 [00000000] [init -> tz_vmm] lr_abt = 00000000 [00000000] [init -> tz_vmm] spsr_abt = 00000000 [00000000] [init -> tz_vmm] sp_irq = 00000000 [00000000] [init -> tz_vmm] lr_irq = 00000000 [00000000] [init -> tz_vmm] spsr_irq = 00000000 [00000000] [init -> tz_vmm] sp_fiq = 00000000 [00000000] [init -> tz_vmm] lr_fiq = 00000000 [00000000] [init -> tz_vmm] spsr_fiq = 00000000 [00000000] [init -> tz_vmm] ttbr0 = 112a1041 [init -> tz_vmm] ttbr1 = 93a2c04b [init -> tz_vmm] ttbrc = 00000000 [init -> tz_vmm] dfar = 114558eb [00000000] [init -> tz_vmm] exception = pf_abort
Regards
Chirag Garg IIT Madras , Rise Lab
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