On Thu, Apr 14, 2016 at 11:48:58AM +0200, Menno Valkema wrote:
Hi Everyone,
I've some questions with regards to Genode synchronization features between threads and components.
First a question about packet streams:
- Can we expect the packet streams to deliver packets in order to the
other component as a FIFO? Thus: can we expect the packet submitted first, to be delivered first at the other component? Also when bursts of packets are send through the packet stream?
There is a FIFO queue of packets from the source to the sink, and a FIFO queue of acknowledge packets from the sink back to the source. However, the sink could dequeue a number of packets and then acknowledge them out of order. A good component will strive to have minimal state, so it should be safe to assume that packets will be processed and acknowledged FIFO. Even if you get into the cases of network coding or disk head seek optimization, that sort of work would probably be done in a second buffer at the sink component and you'll still see FIFO behaviour.
- Say we have 2 threads in the same component, where Thread A needs to
sleep until an event occurs in Thread B. How to address this? If A and B were components, signals would be the answer. Would signals also work between threads within the same component or is there some other approach?
Signals would work between threads in the same component, but using simple primatives like locks and semaphores will give you better performance, because issueing signal capabilities and exchanging signals requires work outside the component.
- What if those same 2 threads need to exchange data? When data is
shared between components, shared memory would be the answer. How to approach this with 2 threads within the same component. Setup a shared data space? Do those 2 threads share the same heap which we can use for this exchange?
Multiple threads within a component use the same address space, there shouldn't be any extra work in shared data between threads. You have the option of using independent heaps on different RAM sessions, but the mapping is still in the same space.
Correct me anyone if I am wrong, Emery