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2332 discussions

Placing Qt5 Windows on Genode Startup
by Johnathan Gohde 16 Apr '18

16 Apr '18

Hello, I've been trying to figure out how to give an initial window placement for Qt5 applications on startup. I've tried to mimic the example set in ported applications, like found in qt_launchpad/main.cpp:89, using a window.move(0,0) call in my application, but this doesn't place the window in the corner. Can anybody help me out or point me in the right direction? Thanks, -- Johnathan Gohde Senior Research Scientist Adventium Labs

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preparing ports
by Roman Iten 13 Apr '18

13 Apr '18

Hi I have problems preparing some ports (on current master, d54f95d49): gnupg generate gnupg.hash Error: ports/ports/gnupg.port is out of date, expected de58de758b6ff17d573b5f17f5c8264693c1e6ff fatfs prepare port fatfs download http://www.elm-chan.org/fsw/ff/arc/ff13a.zip Error: Hash sum check for fatfs failed egl_api prepare port egl_api download https://www.khronos.org/registry/EGL/api/EGL/egl.h Error: Hash sum check for egl.h failed Can anybody help me? Thanks, Roman

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Proposal for nic_tap component
by Martijn Verschoor 13 Apr '18

13 Apr '18

Hi everyone, I would like to pitch an idea to improve network protocol debugging on Genode. I value the verbosity option of the `nic_router` and the `nic_dump` components, but sometimes I'd like the ability delve deeper into packets, like I am used to with Wireshark. But extending the log based network debugging in Genode to reach that level of detail clearly doesn't make sense. Another option is to introduce an intercepting `nic_tap` component that implements a bump-in-the-interface between a Nic client and a Nic server and duplicates all packets between the client and the server to a dedicated Nic tap interface. A Nic client connected to the Nic tap interface is presented with all network packets, both up- and downstream, of the intercepted Nic session. The nic_tap is especially useful when running on real hardware. There are various ways to use the nic_tap. An obvious scenario is to setup an instance of VirtualBox with Linux and Wireshark that is routed to use the Nic tap. But it should also be possible to route the Nic tap to an external Nic interface (granted that you have a solution to tie two Nic clients together, but thatâs easy enough). In my view the nic_tap would be a valuable and complementing addition to the set of Genode network debugging tools. What do you think, would you benefit from such a component? -- Met vriendelijke groet / kind regards, Martijn Verschoor Cyber Security Labs B.V. | Gooimeer 6-31 | 1411 DD Naarden | The Netherlands +31 35 631 3253 (office) | +31 616 014 087 (mobile)

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base-hw kernel binaries
by Johannes Kliemann 11 Apr '18

11 Apr '18

Hi all, I'm currently measuring the code base sizes of Genode with different kernels. I have split this into the kernel itself and kernel-dependent code of Genode (core and ld.lib.so). This worked well for all kernels except hw where I couldn't really make a distinction between the kernel and core. The only additional binary is is called *.bootstrap and resides inside var/. Unfortunately it doesn't contain any references to its source code and I couldn't find any debug binary that does so (I need this since I measure the code size by source references in elf binaries via objdump). Is there a way to build this binary with more debug information. And more generally how are the kernel part and core separated in hw (which isn't as easy as with other kernels that use a port)? Regards, Johannes

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libreboot x200 thinkpad
by unknown＠example.com 09 Apr '18

09 Apr '18

Greetings :) I have recently purchased a libreboot x200 thinkpad, and attempted to boot Genode's Sculpt scenario from USB. Unfortunately, nothing happened at all. Will there be any support for libreboot/coreboot devices in the future? Cheers, Joel Desermeau

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simple IPC test results
by yu000013 05 Apr '18

05 Apr '18

Hi there, I'm currently doing tests of IPC on different microkernels using Genode framework. I modified hello_tutorial repo to utilize this very simple scenario where server and client communicate via RPC. My set up is as follows: I ran "make run/hello" in each build directory of fiasco_x86, nova_x86_32, okl4_x86, pistachio_x86. These build directories are all created as is instructed on genode website. Then I modified etc/build.conf to enable kvm, and uncommented "libports" repo, and added "hello_tutorial" repo. In client.h, re-implement the add() function as to invoke 10 call<Rpc_add>() functions in sequence (to mitigate the variation of elapse cycles). Before the first invocation and after the tenth invocation of call<Rpc_add>(), I invoke two rdtsc respectively and store the current cycle in two variables. Then before this add() function returns, I print out the difference between the two rdtsc results. Depend on the different microkernel, the cycles elapsed along the 10 Rpc_add execution varies from around 80000(for okl4_x86) to 170000 (for fiasco_x86). That is, the cycles elapsing while executing ONE Rpc_add would be around 8000 to 17000 cycles, which seems very long. So I want to know: is these results reasonable? Or I missed anything in my tests? Thank you very much! Yelly

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usb issues on AMD 9xx chipset
by Nobody III 03 Apr '18

03 Apr '18

I've been testing Genode's current compatibility with my desktop computer, which has an AMD 9xx chipset. While the framebuffer driver works fine, usb_drv does not. Here's the full output: Genode 18.02-2-g6888094f6 <local changes> 16299 MiB RAM and 63253 caps assigned to init [init -> acpi_drv] Found MADT [init -> acpi_drv] MADT IRQ 0 -> GSI 2 flags: 0 [init -> acpi_drv] MADT IRQ 9 -> GSI 9 flags: 15 [init -> acpi_drv] Found MCFG [init -> acpi_drv] MCFG BASE 0xe0000000 seg 0x0 bus 0x0-0xff [init -> platform_drv] 0:2.0 - bridge 1:0.0 [init -> platform_drv] 0:9.0 - bridge 2:0.0 [init -> platform_drv] 0:14.4 - bridge 3:0.0 [init -> platform_drv] 0:15.0 - bridge 4:0.0 [init -> platform_drv] 0:15.3 - bridge 5:0.0 [init -> usb_drv] Could not read screen resolution in config node [init -> usb_drv] Configured HID screen with 0x0 (multitouch=false) [init -> usb_drv] No <storage> config node found - not starting the USB Storage (Block) service [init -> usb_drv] No <nic> config node found - not starting the USB Nic (Network) service [init -> usb_drv] No <raw> config node found - not starting external USB service [init -> usb_drv] Enabled UHCI (USB 1.0/1.1) support [init -> usb_drv] Enabled OHCI (USB 1.0/1.1) support [init -> usb_drv] Enabled EHCI (USB 2.0) support [init -> usb_drv] Enabled XHCI (USB 3.0) support *[init -> platform_drv] Warning: Out_of_caps during Device_component construction* *[init -> platform_drv] Warning: Out_of_caps during Device_component construction* *[ 0] sys_assign_pci: Invalid Hint (0x200)* [init -> platform_drv] Error: usb_drv -> : assignment of PCI device 2:0.0 failed phys=0xe0200000 virt=0x80400000 [init -> usb_drv] ioremap: mapped phys 0xfe100000 (size 32768) to virt 0x20000 [init -> usb_drv] dev_info: xHCI Host Controller [init -> usb_drv] dev_info: new USB bus registered, assigned bus number 1 [init -> usb_drv] dev_info: hcc params 0x040040a5 hci version 0x100 quirks 0x00000010 [init -> platform_drv] 2:0.0 adjust IRQ as reported by ACPI: 10 -> 48 [init -> platform_drv] 2:0.0 uses MSI 64bit, vector 0x9f, address 0xfee10000, maskable [init -> usb_drv] dev_info: USB hub found [init -> usb_drv] dev_info: 4 ports detected [init -> usb_drv] dev_info: xHCI Host Controller [init -> usb_drv] dev_info: new USB bus registered, assigned bus number 2 [init -> usb_drv] dev_info: We don't know the algorithms for LPM for this host, disabling LPM. [init -> usb_drv] dev_info: USB hub found [init -> usb_drv] dev_info: 4 ports detected [ 0] sys_assign_pci: Invalid Hint (0xb2) [init -> platform_drv] Error: usb_drv -> : assignment of PCI device 0:16.2 failed phys=0xe00b2000 virt=0x1000 [init -> usb_drv] ioremap: mapped phys 0xfe204000 (size 256) to virt 0x17000 [init -> usb_drv] dev_info: EHCI Host Controller [init -> usb_drv] dev_info: new USB bus registered, assigned bus number 3 [init -> usb_drv] dev_info: applying AMD SB700/SB800/Hudson-2/3 EHCI dummy qh workaround [init -> platform_drv] 0:16.2 adjust IRQ as reported by ACPI: 11 -> 17 [init -> platform_drv] 0:16.2 uses IRQ, vector 0x11, non-maskable [init -> usb_drv] dev_info: irq 130, io mem 0xfe204000 [init -> usb_drv] dev_info: USB 2.0 started, EHCI 1.00 [init -> usb_drv] dev_info: USB hub found [init -> usb_drv] dev_info: 4 ports detected [ 0] sys_assign_pci: Invalid Hint (0x9a) [init -> platform_drv] Error: usb_drv -> : assignment of PCI device 0:13.2 failed phys=0xe009a000 virt=0x1000 [init -> usb_drv] ioremap: mapped phys 0xfe207000 (size 256) to virt 0x28000 [init -> usb_drv] dev_info: EHCI Host Controller [init -> usb_drv] dev_info: new USB bus registered, assigned bus number 4 [init -> usb_drv] dev_info: applying AMD SB700/SB800/Hudson-2/3 EHCI dummy qh workaround [init -> platform_drv] 0:13.2 adjust IRQ as reported by ACPI: 11 -> 17 [init -> platform_drv] 0:13.2 uses IRQ, vector 0x11, non-maskable [init -> usb_drv] dev_info: irq 131, io mem 0xfe207000 [init -> usb_drv] dev_info: USB 2.0 started, EHCI 1.00 [init -> usb_drv] dev_info: USB hub found [init -> usb_drv] dev_info: 5 ports detected [ 0] sys_assign_pci: Invalid Hint (0x92) [init -> platform_drv] Error: usb_drv -> : assignment of PCI device 0:12.2 failed phys=0xe0092000 virt=0x1000 [init -> usb_drv] ioremap: mapped phys 0xfe209000 (size 256) to virt 0x29000 [init -> usb_drv] dev_info: EHCI Host Controller [init -> usb_drv] dev_info: new USB bus registered, assigned bus number 5 [init -> usb_drv] dev_info: applying AMD SB700/SB800/Hudson-2/3 EHCI dummy qh workaround [init -> platform_drv] 0:12.2 adjust IRQ as reported by ACPI: 11 -> 17 [init -> platform_drv] 0:12.2 uses IRQ, vector 0x11, non-maskable [init -> usb_drv] dev_info: irq 132, io mem 0xfe209000 Also, I get the following message in dmesg on linux (from drivers/usb/host/pci-quirks.c), but not from usb_drv: QUIRK: Enable AMD PLL fix What might be going on? Why would usb_drv cause platform_drv to run out of CAPs, even when I assign it 2000 CAPs (instead of 800)?

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Question about long IPC implementation in Genode implementation
by yu000013 03 Apr '18

03 Apr '18

Hi there, I'm currently doing tests of IPC on different microkernels using Genode framework. I'm wondering whether there're any long IPC implementation inside the framework that I can make use of. Thank you very much! Yelly

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base-linux ram dataspace file descriptor usage
by Johannes Kliemann 29 Mar '18

29 Mar '18

Hi all, I'm struggling with modifying the Ram_dataspace in base-linux. I have replaced the file descriptor opened in > void Ram_dataspace_factory::_export_ram_ds(Dataspace_component *ds) in base-linux/src/core/ram_daraspace_support.cc by opening a special device file that provides mappable ram. I have attached the exact diff that causes the segfault. The kernel module that provides the device file and the ioctl is available at [1]. I have tested it on a Linux system and mapping memory and reading/writing it worked flawlessly. With this change each component creates a segmentation fault. I was not able to trace it, I couldn't even find out in which file it occurs. The instruction pointer randomly appeared in repos/base/src/lib/base/lock.cc or in repos/base/src/lib/base/heap.cc. I have touched neither of these files. Is there any information about where this is used exactly? I was unable to trace the usage of the mapped memory beyond Region_map_mmap::attach. I have also traced the calls inside the kernel module and it looks as it only uses open, mmap and close so there shouldn't a problem. I'd like to give you further information about this but I have absolutely no idea by myself. Regards, Johannes [1]: https://github.com/jklmnn/hwiodev/blob/0f5d367162812ee015434e5b97fdf208ef36…

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access to tsc calibration info
by Steven Harp 27 Mar '18

27 Mar '18

x86-specific question: Is there a generic way to get access to the TSC frequency calibration information, as provided by modern x86 CPUs in MSRs? (User mode components cannot directly read these.) The information is readily available in Nova's hypervisor information page (Hip), conveniently exported as a ROM. But I am not spotting a similar export for (e.g.) seL4. The data is present in the sel4 boot info structure (in core)--maybe this is accessible to components in some manner? Suggests a possible platform API, if not already present... Suggestions? // Steve Harp

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