base-hw ,,, What is CACHE_LINE_SIZE_LOG2?

[Martin Stein]

On 18.11.2013 16:22, bob wrote:
> However, setting the SECURITY_EXTENSION to 1 did produce an interesting 
> result, in that the kernel crashed with an "undefined instruction" 
> message. I traced this down to a call to the Security Control register, 
> specifically to the assembly code for the read which is "asm volatile 
> ("mrc p15, 0, %[v], c1, c1, 0" : [v]"=r"(v) ::);". This is used in the 
> method to get the security mode setting in the cpu object.According to 
> the Armv7-A Architecture Reference Manual, the assembly code appears to 
> be correct. I'm not sure how to interpret that. Does it mean that the 
> Security control is just not implemented?
This suggests that your board doesn't implement the ARM trustzone
extension and thus not provide the co-processor #15 register c1.c1.0.
Does the board spec say anything about trustzone or secure/non-secure mode?

Martin