base-hw ,,, What is CACHE_LINE_SIZE_LOG2?

[Martin Stein]

On 18.11.2013 11:42, Norman Feske wrote:
> Maybe your platform starts the kernel in
> non-secure mode? If I remember right, the secure/non-secure mode must be
> distinguished when setting up mappings in the page table.
On ARMv7 a complete base-hw page-table is either secure or non-secure. A
page table sets its secure bit automatically according to the mode that
is active while the page table gets constructed (see
base-hw/src/core/tlb/arm_v7.h). The decision, whether secure or
non-secure mode is active (Arm_v7::Cpu::secure_mode()) depends on
Board_base::SECURITY_EXTENSION (in
base/include/platform/$YOUR_BOARD/drivers/board_base.h). So it might be
that this parameter is set inappropriate for your board. When adding
mappings to page tables, secure-mode setting doesn't have to be considered.

Martin