iMX8 not all cores starting

Stefan Kalkowski stefan.kalkowski at genode-labs.com
Tue Oct 6 16:18:09 CEST 2020


Hi,

On Tue, Oct 06, 2020 at 03:06:35PM +0200, Duss Pirmin wrote:
> Hi,
> 
> 
> On 06.10.20 13:44, Stefan Kalkowski wrote:
> > 
> > The value 0xC4000003 is no register, but a SMC call [0] function
> > identifier, and part of the Power State Coordination Interface [1].
> > So 0xfffffffffffffff7 seems to be -9, which means INVALID_ADDRESS
> > according to [1]. Looks like the provided ip is not ok? It has to be
> > in the RAM below 0x40000000, isn't it?
> 
> I also had found the description for the PSCI and had started reading in it.
> 
> The address is indeed 0x4001003c. This parameter comes form the call in
> base-hw/src/bootstrap/spec/arm_64/cortex_a53_mmu.cc where
> wake_up_all_cpus() is called with the address of _crt0_start_secondary.

sorry, for my misleading wrong sentence. I meant it has to be _not_
below 0x40000000. And I was refering to the ARM Trusted Firmware
sources, I found are the right one for the i.MX 8MQ EVK. For your SoC,
I found the line[0] to be the relevant one for the ip checking.

The question arises what version of the ATF are you using. Did you
compiled the bootloader chain yourself?

Regards
Stefan

[0] https://source.codeaurora.org/external/imx/imx-atf/tree/plat/imx/imx8mm/imx8mm_psci.c?h=imx_5.4.3_2.0.0#n58
> 
> How can I influence where a function is placed? I see, that in
> base/src/ld/genode.ld the content from crt0 is integrated.
> 
> 
> Regards,
> Pirmin
> 




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-- 
Stefan Kalkowski
Genode labs

https://github.com/skalk | https://genode.org



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