Genode on RPI

[Bob Stewart]

Hi Tomasz,

Are you saying that the instruction cps #31 to set SVC state in crt0.s failed after u-boot left you in the aarch32 execution state? If so that would mean armv7 code does not run on an armv8 platform. Crt0.s should run without any changes.

I suspect your loosing debug output because the MMU is failing on a table walk. Easy way to find out is to insert a halt  after SCTRL write which should get you back to u-boot for a reset. Comment out enabling the mmu (the M bit)  and you'll hit the halt. Then run it again with M set and if the halt isn't executed, the MMU wandered off into oblivion. Then the problem is the physical differences between the platform the rpi code your using and the Model 3 version you are running. I usual start that debugging by check the translation tables starting from the base address you wrote to TTBR0.

Good Luck,

Bob

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________________________________
From: Tomasz Gajewski <tomga at wp.pl>
Sent: Sunday, January 6, 2019 6:08:33 PM
To: users at lists.genode.org
Subject: Re: Genode on RPI



> Christian Helmuth <christian.helmuth at genode-labs.com> writes:
>>
>> I'm not an U-Boot expert but as I understand it the loader sensibly
>> handles the boot-image format [1] [2] by switching to AArch32 or
>> AArch64 depending on the image-header information. So, it should be a
>> matter of
>>
>>   mkimage -A arm  vs.
>>   mkimage -A arm64
>>
>> Or Am I wrong?
>
> That's what I was suggesting when writing about patches but it seems I
> did not write that clearly enough. I've seen informations about those
> patches in mailing lists from 2016 and assumed that u-boot does the
> switch to Aarch32.
>
> I'll try to make some tests during the weekend that will somehow
> clarify what is happening.

u-boot switches to Aarch32 in my current configuration.

Using suggested by Bob method (writing to memory and checking it after
reset) I confirmed that code crt0.s from bootstrap is started in HYP
mode and using code:

    mrs r0,cpsr
    bic r0,r0,#0x1F
    orr r0,r0,#0x13
    msr spsr_cxsf,r0
    add r0,pc,#4
    msr ELR_hyp,r0
    eret

taken from [1] I could switch to SVC mode what allowed to continue boot.

Currently I don't know how far it goes (but further than in my earlier
attempts) because write after enabling address translation in
repos/base-hw/src/bootstrap/spec/rpi/platform.cc with:

    sctlr = Cpu::Sctlr::read();
    Cpu::Sctlr::C::set(sctlr, 1);
    Cpu::Sctlr::I::set(sctlr, 1);
    Cpu::Sctlr::M::set(sctlr, 1);
    Cpu::Sctlr::write(sctlr);

I loose ability to write debug to memory.

At least I'm now in a state that I think I understand what is going on
and I'll continue research when time permits.

Thanks for help.

[1] https://github.com/dwelch67/raspberrypi/tree/master/boards/pi3/aarch32/SVC

Tomasz Gajewski


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