Query regarding extracting instruction which caused a data-abort exception

rijurekha at ...71... rijurekha at ...71...
Fri Jun 23 11:10:20 CEST 2017


Why do you say you do not save DFAR in the assembler path? Isn't DFAR
saved in lines 15. and 27. below, while other registers are saved in line
3. in base-hw/src/core/spec/arm_v7/trustzone/mode_transition.s? This is
where control will come for csu abort with
_mon_dab_entry: _nonsecure_to_secure DAB_TYPE, 8, right?

1. .macro _nonsecure_to_secure exception_type, pc_adjust
2.	ldr   sp, _tz_client_context   /* load context pointer*/
3.	stmia sp, {r0-lr}^             /* save user regs r0-r12,sp,lr*/
4.	add   r0, sp, #15*4
5.	.if \pc_adjust != 0            /* adjust pc if necessary*/
6.		sub lr, lr, #\pc_adjust
7.	.endif
8.	stmia r0!, {lr}                /* save pc*/
9.	mrs   r1, spsr                 /* spsr to r0*/
10.	mov   r2, #\exception_type     /* exception reason to r1*/
11.	b     _nonsecure_kernel_entry
12. .endm /* _non_to_secure */

13. _nonsecure_kernel_entry:
14. 	stmia r0!, {r1-r2}          /* save spsr, and exception reason */
15. 	mrc   p15, 0, r3, c6, c0, 0 /* move DFAR  to r3                */
16.	mrc   p15, 0, r4, c2, c0, 0 /* move TTBR0 to r4                */
17.	mrc   p15, 0, r5, c2, c0, 1 /* move TTBR1 to r5                */
18.	mrc   p15, 0, r6, c2, c0, 2 /* move TTBRC to r6                */
19.	mov   r1, #0
20.	mcr   p15, 0, r1, c1, c1, 0 /* disable non-secure bit          */
21.	_save_bank 27               /* save undefined banks            */
22.	_save_bank 19               /* save supervisor banks           */
23.	_save_bank 23               /* save abort banks                */
24.	_save_bank 18               /* save irq banks                  */
25.	_save_bank 17               /* save fiq banks                  */
26.	stmia r0!, {r8-r12}         /* save fiq r8-r12                 */
27.	stmia r0!, {r3-r6}          /* save MMU registers              */
28.	cps #SVC_MODE
29.	adr r0, _tz_master_context
30.	_restore_kernel_sp r0, r1, r2 /* apply kernel sp */
31.	add r1, r0, #LR_OFFSET
32.	ldm r1, {lr, pc}

Also, is there a tutorial how to use jtag to debug genode assembly? WE
have never used jtag, but have an olimex arm-usb-ocd-h.

Thanks!
Riju














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