Translation Table Memory Attribute bits
stefan.kalkowski at ...1...
Mon Sep 8 13:21:13 CEST 2014
On 09/08/2014 08:49 AM, Stefan Kalkowski wrote:
> I'm wondering why device memory on that non-SMP system needs to be
> shareable, but it's good to know. Thank you for the insight.
Ok, the answer to the question can be found in the common Cortex A
reference manual, and in part in Arm v7 manual:
In contrast to normal memory, where the shareability says whether the
memory is shared between multiple cores or not, device memory could be
(non-)shareable in the past to "distinguish between accesses directed to
the “peripheral private port” found on several ARM11 processors. This
use is now deprecated and processors implementing LPAE treat all device
accesses as Shareable."
"ARM deprecates the marking of Device memory with a shareability
attribute other than Outer Shareable or Shareable. This means ARM
strongly recommends that Device memory is never assigned a shareability
attribute of Non-shareable or Inner Shareable."
Sorry for the ARM-specific "spam".
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