base-hw ,,, What is CACHE_LINE_SIZE_LOG2?

[bob]

On 11/18/2013 11:00 AM, Bob Stewart wrote:
> I dont see anything about trustzone extension or secuitry mode.I suspect it
> does not, but I'll check with the community.
>
> Thanks,
>
> Bob
>
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> On November 18, 2013 10:31:36 AM Martin Stein
> <martin.stein at ...1...> wrote:
>> On 18.11.2013 16:22, bob wrote:
>>> However, setting the SECURITY_EXTENSION to 1 did produce an interesting
>> result, in that the kernel crashed with an "undefined instruction" message.
>> I traced this down to a call to the Security Control register, specifically
>> to the assembly code for the read which is "asm volatile ("mrc p15, 0,
>> %[v], c1, c1, 0" : [v]"=r"(v) ::);". This is used in the method to get the
>> security mode setting in the cpu object.According to the Armv7-A
>> Architecture Reference Manual, the assembly code appears to be correct. I'm
>> not sure how to interpret that. Does it mean that the Security control is
>> just not implemented?
>> This suggests that your board doesn't implement the ARM trustzone
>> extension and thus not provide the co-processor #15 register c1.c1.0.
>> Does the board spec say anything about trustzone or secure/non-secure mode?
>>
>> Martin
>>
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> I haven't heard back from the TI E2E group, but if the kernel was not in the Secure state it would not be able to read the Scr register because it has restricted access. Thanks to Christian reading what I should have read, the kernel is starting in user mode. Do I have to generate some kind of excpetion in order to change the mode to a privileged one? How would I go about getting into a correct mode?
> Thanks for all the time you guys have spent responding to me.
>   Bob
>
>
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