Actually, the research group that I coordinate at IIT Madras is working on both RISCV V and L4. Norman knows us well and so does Prof. Patterson. We maintain the i.MX6 L4 port and are adding trustzone support to that platform along with a virtualized version of android for secure phones.
We have our own PPC derived MMU and are trying to sync with the RISCV supervisor ISA. We are also adding an enhanced version of trustzone to our RISCV variant. A good HW TCB is mandatory for a meaninful secure L4 port.
L4 is actually our primary OS target for secure applications and we have a secure RISCV variant specifically targetted at L4. In general we anticipate all our linux work also to be virtualized on top of L4.
If you need more details, drop me an email and I will fill you in.
Following up on my prior note regarding running the Genode OS on Risc-V..So I gather that there still might be some time for a potential collaboration between the the Genode OS camp and Dr. Patterson's Risc-v group?...That is, as I understand it Genode Labs would love to work/co-design with an open source CPU design group, such that the CPU's supervisory hardware interfaces with minimal complexity to the Genode process protection model??Do I have that right?all the best-PeterOn Mon, Aug 25, 2014 at 7:41 PM, Peter Lindener <lindener.peter@...9...> wrote:
DearNorman and fellow Genodians..Taking note of Johanne's efforts to bring up the Genode OS to run on the LEON_3 CPU... prompted me to do a little catching up. Risc-V the current very promising state of Open source CPU core design.... here is the current state of Risc_V's software tool chain.....it seems we might want to think about how Genode's tool chain support could evolve to handle this fairly promising open Risc platform.... such that as lowRISC come's into it's existence, running Genode on it might be just the ticket.all the best-Peter
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