Hi Stefan,
I think I have found the problem.
In the file repos/base-hw/src/core/spec/arm_v7/mode_transition.s,  the assembly "msr spsr, r0" is alway compiled to "msr spsr_cf, r0", which leaves [23:8] untouched. This include the E bit. Whereas the used chip seems has a  random spsr  left in SVC mode after power on.
I have patched the instruction to "msr spsr_cxfs, r0". Now the system runs well.
Hope this helps.

Thanks.
Regards,
Le Guan

On Tue, Sep 29, 2015 at 1:00 PM, Le Guan <guanle.ustc@...9...> wrote:
Hi Stefan,
Thanks for your kind reply. My board is I.MX6 SABRE platform for smard devices. I modified the RAM0_SIZE to 0x40000000 according to the board reference manual. In addition, I used the building system for hw_wand_quad. Is there anything wrong? I also add RUN_OPT = --include boot_dir/hw --include image/uboot to the etc/build.conf in the build directory. The used bootloader is the Freescale's default U-boot.

The used run script is the unmodified run/printf, which is like this,

build "core init test/printf"

create_boot_directory

install_config {
    <config>
        <parent-provides>
            <service name="LOG"/>
            <service name="RM"/>
        </parent-provides>
        <default-route>
            <any-service> <parent/> </any-service>
        </default-route>
        <start name="test-printf">
            <resource name="RAM" quantum="10M"/>
        </start>
    </config>
}

build_boot_image "core init test-printf"

append qemu_args "-nographic -m 64"

run_genode_until {-1 = -1 = -1} 10

puts "Test succeeded"

The used branch is the official 15.08 master branch (https://github.com/genodelabs/genode/tree/15.08).

Hope the information helps!
Thanks a lot!
Regards,
Le Guan


On Tue, Sep 29, 2015 at 2:32 AM, Stefan Kalkowski <stefan.kalkowski@...1...> wrote:
Hi,

On 09/28/2015 05:24 PM, Le Guan wrote:
> Hello everyone,
> I ran the lastest base-hw on my i.MX6 SABRE, but found that the program
> crashes randomly, because of page faults. The output is like this:
> "Pagefault in core thread (core): ip=1001903c fault=70159530"
>
> I later figured out that this is because the E bit of the CSPR register is
> randomly changed to 1 when switching to the user mode, but the memory is
> arranged in LE. This causes the LDR instruction to load a wrong address. Do
> anyone know why does this happen and how to solve it?
>

Well, that sounds really strange. I'm wondering that you experience such
problems. We test i.MX6 using the Wandboard all nights without those
errors. Can you provide a branch to us including a run-script that
triggers this problem?

Regards
Stefan

> Thanks in advance!
> Best,
> Le Guan
>
>
>
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--
Stefan Kalkowski
Genode Labs

http://www.genode-labs.com/ · http://genode.org/

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